Most modern power supplies have a bank of capacitors at the input, which is completely discharged when the unit is off and needs to be charged with energy coming from the mains to start operation. During startup a high current condition or inrush can occur that may damage the equipment and also trip the external circuit breakers or fuses. Several prior art techniques have been used to limit the current inrush.
FIG. 1 is a diagram of one such method. It illustrates a negative temperature coefficient (NTC) in rush limiter (10). For low power applications, the current can be limited with a variable resistor in series. An NTC type resistor (12) allows reduction of power dissipation when the unit is operation, because the circulating current creates the necessary heat to make the resistance go down. Usually special resistors designed for this purpose (inrush current limiter, ICL) need to be used to guarantee that they will withstand the high pulse of energy during the capacitor bank charging.
At high power (single phase or three phase), if the NTC ICL (12) resistor is kept in series with the input current, the nominal current will cause undesired power dissipation in steady state making the ICL resistor (12) too big and expensive. The solution for that is to bypass it with a switch (16) once the capacitors are charged as illustrated in the rush limiter (14) of FIG. 2. In FIG. 3, the inrush limiter (18) utilizes a thyristor (20) or Silicon Controlled Rectifier (SCR) is used instead of the switch. There is also an AC power source (24), a bridge (26) and capacitor (28). In order to minimize the power dissipation in the resistor and to prevent catastrophic failures in case the SCR fails to close, normally a positive temperature coefficient type is used. In this instance, there is a positive temperature coefficient (PTC) thermistor (22).
The key drawback is that this technique is based on a dissipative charging. One improvement is to use a transistor and switch it based on the actual measured current, as described in U.S. Pat. No. 6,862,201 to Hodge. The Hodge invention is based on a resistor to limit inrush but has an insulated gate bipolar transistor (IGBT) that can be turned off. This makes it inconvenient to limit secondary inrush in most applications because during this transient the capacitors need to be charged very quickly, and this is not possible with a resistor designed to provide soft start at power up.
In order to avoid the size and extra power dissipation of the resistor in the previous techniques, it is desirable to use solid state switches to provide a non-dissipative soft start. A zero crossing detection circuit can be used to control an SCR or a transistor (see as example U.S. Pat. No. 6,445,165 to Malik, et al., limited to single phase only). These techniques have two main disadvantages. First, slow charging time is long: they need several line cycles because they only conduct for a small portion of them each. Secondly, they don't provide protection for secondary inrush.
In order to overcome the previous disadvantages, a high frequency pulse width modulated (PWM) stage can be employed to limit the input current. Buck and boost topologies have also been used. The U.S. Pat. No. 6,487,098 to Malik, et al is a buck-boost converter that inverts the output voltage polarity. Both switches operate all the time. There are also Cascaded Buck+Boost Power Factor Corrections (PFCs). The PFCs could be frequency filters, but this typically requires larger inductors and/or capacitors, which in turn impact size, cost, and power dissipation. FIG. 4 is a comparison of input current during startup. FIG. 5 is a comparison of capacitor voltage during start-up. The 3 cases shown are: a) no inrush limit, b) traditional resistor based inrush limit, c) buck based inrush limit. The maximum desired current is assumed to be 100% in the plots. Using the constant current provided by PWM results in a much more efficient charging (shorter time without exceeding current limit).
There are several advantages of using a buck converter to limit inrush. For example, an optimum charging time of the DC capacitors, because they are charged with constant (max) current. FIG. 5 shows an example of the same system with different inrush limiting techniques. Since the buck converter provides an optimum charging current, the time is minimized without exceeding the limit. With a minimum amount of capacitance, it allows to successfully make it through severe brown-outs (a drop in normal voltage in the system) by providing optimum current limiting during the so called secondary inrush. Also, the buck transistor provides extra protection against failures in the power stages.
The methods listed above are all intended to provide a wide input range so the buck converter is active during normal operation. This makes the buck components (transistor and diode) dissipate significant power due to conduction and switching losses. These losses drive the size and cost of a unit, making these solutions not economically viable to limit inrush current. This explains why they have not been massively adopted in the industry in spite of their technical benefits.
What is needed is a buck and boost topology that dissipates less power than using traditional buck and boost techniques.